Teaching Kasım Sinan Yıldırım

Course Objectives

The objective of this course is to teach the main hardware components of a computer system and give necessary background to design a microprocessor unit.

Reference Textbook

[1] Sarah Harris,David Harris, Digital Design and Computer Architecture: ARM Edition
The first and second edition of the book are online: [First Edition] [Second Edition]
Midterm Grades: here.

Lecture Materials

Lecture notes (slides and exercises) are sufficient to understand the course topics.
Reading the chapters of your textbook [1] will allow you to understand the course topics in greater depth.
Topics Exercises Additional Reading
Review - Logic Gates
Review - Combinational Circuits Chapter 2 of [1]
Combinational Circuit Timing Question Set #1 Section 2.9 of [1]
Latches and Flip-Flops Question Set #2 Sections 3.1 and 3.2 of [1]
Sycnhronous Sequential Circuit Design Question Set #3 Sections 3.2. 3.3 and 3.5 of [1]
Arithmetic Logic Unit, Shifters, Rotators Question Set #4 , Question Set #5 From Section 5.1 to 5.2.5 of [1]
Counters, Shift Registers, Memory Arrays Question Set #6 Sections 5.4 and 5.5 of [1]
Architecture-I: ARM Assembly Language Question Set #7 Sections 6.1 to 6.4 of [1]
Architecture-II: Machine Language Question Set #8 Section 6.4 of [1]
Hardware Description Languages Section 4 of [1]
Microarchitecture Question Set #9 Section 7.1, 7.2 and 7.3 of [1]
ARM Instruction Set Reference


Write your solutions neatly for the given assignments and bring to the class at due date.
Assignment Due
Question Set #1 and Question Set #2 6 March
1,2,3,4 and 5 in Question Set #3 13 March
Question Set #4 20 March
5, 6, 7 and 8 in Question Set #6 27 March
Question Set #7 8 May
Question Set #8 15 May
Question Set #9 22 May

Term Project

Simple Processor Design using SystemVerilog
Project Description: Click here.
Project Control: 30 May


We will have some FPGA assignments to learn the basics of hardware description languages.
Laboratory Date
Sequential Circuits 22/23 March
Arithmetic Logic Unit 29/30 March
Counters/Memory 5/6 April
Introduction to SystemVerilog

Install ModelSim before lab session.
10/11 May
SystemVerilog and Sequential Logic 17/18 May